Title |
Robust design of DRAM core circuits : yield estimation and analysis by a statistical design approach / Yan Li |
|---|---|
Involved |
Yan Li (Verfasser) |
Published |
Aachen: Shaker |
Extent |
IX, 127 S. : graph. Darst. |
Thesis |
Zugl.: München, Techn. Univ., Diss., 2010 |
ISBN |
978-3-8322-9845-6 |
Language |
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Country |
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Topic |
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Subject |
Dynamisches RAM, Leseverstärker, CMOS, Speicherzelle, Chip, Schaltungsentwurf, Schaltungsanalyse, Leckstrom |
DDC notation |
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Series |
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Other editions |
Erscheint auch als Online-Ausgabe: Robust Design of DRAM Core Circuits : Yield Estimation and Analysis by A Statistical Design Approach |
Record ID |
1011684764 |
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