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Ulrich Golze

VLSI Chip Design with the Hardware Description Language VERILOG : An Introduction Based on a Large RISC Processor Design

Berlin, Heidelberg: Springer Berlin Heidelberg, 1996

Title	VLSI Chip Design with the Hardware Description Language VERILOG : An Introduction Based on a Large RISC Processor Design
Involved	Ulrich Golze (Mitwirkender)
Published	Berlin, Heidelberg: Springer Berlin Heidelberg 1996
Extent	Online-Ressource
ISBN	978-3-642-61001-1
Country	Deutschland
Topic	Informatik
Subject	RISC, VLSI, Schaltungsentwurf, VERILOG
Other editions	Erscheint auch als Druck-Ausgabe: VLSI chip design with the hardware description language VERILOG : an introduction based on a large RISC processor design
Persistent identifier	urn:nbn:de:1111-201309101302 (URN) 10.1007/978-3-642-61001-1 (DOI)
Further information	Lizenzpflichtig
Record ID	1041628641

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VLSI Chip Design with the Hardware Description Language VERILOG : An Introduction Based on a Large RISC Processor Design