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Norbert Wehn

Informatiker

Name	Norbert Wehn
Time	1989- (Wirkungsdaten)
Place	Deutschland
Gender	männlich
Academic degree	Prof. Dr.-Ing.
Profession	Informatiker (characteristic profession) Hochschullehrer Ingenieur (Leiter Microelectronic Systems Design Research Group)
Variant	N. Wehn
Related	Technische Universität Kaiserslautern
Further information	Prof. am Lehrstuhl Entwurf mikroelektronischer Systeme, Techn. Univ. Kaiserslautern
Source	TA Homepage: http://ems.eit.uni-kl.de/index.php?id=42&tx_uniklwehn_pi1[showUid]=10&cHash=bf147c3a74f074bc29423d6279c07a1a
Record type	Person
GND-Identifier	112295908
Record ID	112295908
Involved in show all Optimization and Implementation of DRAM-Based Interleavers for Free-Space Optical Communication Beyond 100 Gbit/s Efficient FPGA implementation of an ANN-based demapper using cross-layer analysis iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing Efficient Hardware Architectures for 1D- and MD-LSTM Networks Efficient Hardware Architectures for 1D- and MD-LSTM Networks Application-aware cross-layer reliability analysis and optimization Power optimization in advanced channel decoding Verfahren zur Architektursynthese mikroelektronischer Systeme Effiziente Verfahren für den physikalischen Entwurf von MOS-VLSI-Schaltungen und ihre Anwendung beim Entwurf eines defekttoleranten Mikroprozessors

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Katalog der Deutschen Nationalbibliothek

Norbert Wehn

Optimization and Implementation of DRAM-Based Interleavers for Free-Space Optical Communication Beyond 100 Gbit/s

Efficient FPGA implementation of an ANN-based demapper using cross-layer analysis

iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing

Efficient Hardware Architectures for 1D- and MD-LSTM Networks

Efficient Hardware Architectures for 1D- and MD-LSTM Networks

Application-aware cross-layer reliability analysis and optimization

Power optimization in advanced channel decoding

Verfahren zur Architektursynthese mikroelektronischer Systeme

Effiziente Verfahren für den physikalischen Entwurf von MOS-VLSI-Schaltungen und ihre Anwendung beim Entwurf eines defekttoleranten Mikroprozessors