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Mladen Bereković (1967-)

Name	Mladen Bereković
Time	1967- (Date of birth and death)
Place	Braunschweig (2007-2017) (Wirkungsort) Lübeck (2017-) (Wirkungsort) Zagreb (Geburtsort) Deutschland
Academic degree	Prof. Dr.-Ing.
Variant	Mladen Berekovic
Related	Technische Universität Braunschweig (2007-2017) Universität zu Lübeck. Institut für Technische Informatik (2017-)
Further information	Diss. Fachbereich Informatik an der Universität Hannover. - 2007-2017 Professor für Chip-Design und Technische Informatik am Institut für Theoretische Informatik, Technische Universität Braunschweig. Seit November 2017 Leitung des Instituts für Technische Informatik an der Universität zu Lübeck
Record type	Person
GND-Identifier	130422843
Record ID	130422843
Involved in show all Single engine architecture for hardware root of trust A HW/SW Framework for Increased Productivity in Designing Faster and More Secure Heterogeneous Computing Systems Beitrag zur Optimierung der statischen Speicherverwaltung in eingebetteten Mehrkernsystemen mit einer harten Echtzeitanforderung : Contribution to the optimization of the static memory management in embedded multicore systems with hard real-time requirements Coarse-grained graph compilation for embedded multiprocessors Fault-tolerant CNN accelerator with reconfigurable capabilities Fault Tolerance and Hardware Acceleration for Automotive and Aerospace Computing Architectures Generic, Extensible Mass Memory Controller Architecture for Short-Term and Long-Term Storage in Space Applications Universal Scripting Interface : Eine universelle Scripting-Schnittstelle für SystemC am Beispiel SoCRocket ARCS 2013 : workshop proceedings Mixed-Criticality on-Chip Network Modeling for fast Virtual Prototyping of Complex Many-Core SoCs Resilient PUF Replacement Based on Secret Unknown Ciphers and its IoT Applications Design technology co-optimization for below N7 technology nodes Evaluating and Comparing the Performance and the Power Consumption of the EESS algorithm for CSS on Heterogeneous Computing Architectures Static Allocation of Basic Blocks Based on Runtime and Memory Requirements in Embedded Real-Time Systems with Hierarchical Memory Layout A Flexible, Heterogeneous Image Processing Framework for Spaceborne Reconfigurable Data Processing Modules An Improved Framework for and Case Studies in FPGA-Based Application Acceleration - Computer Vision, In-Network Processing and Spiking Neural Networks Analysis and Enhancement of a Fault-Tolerant NoC for SRAM-based FPGAs in Space Applications Standard Compliant Snapshotting for SystemC Virtual Platforms Automatisiertes Lernen von Neuronalen Netzen zur Objektklassifikation auf heterogenen Systemen Optimization of energy and power driven architectural exploration for multi-core and heterogeneous System on Chip Architecture of Computing Systems – ARCS 2018 : 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings Domain-Specific High Level Synthesis of Floating-Point Computations to Resource-Shared Microarchitectures Dreidimensional speicherintegrierte Verarbeitungsarchitekturen: Ein holistisches Werkzeug zur Modellierung und Simulation An Execution Model and High-Level-Synthesis System for Generating SIMT Multi-Threaded Hardware from C Source Code Design of Object Detection Systems on a SoC-FPGA Platform ARCS 2013 : workshop proceedings Architecture of computing systems : 24th international conference ; proceedings Architecture of Computing Systems - ARCS 2010 : 23rd International Conference, Hannover, Germany, February 22-25, 2010. Proceedings Architecture of computing systems : proceedings Architecture of computing systems : proceedings Embedded computer systems: architectures, modeling, and simulation : 8th international workshop, Samos 2008, Samos, Greece, July 21 - 24, 2008 ; proceedings Embedded computer systems: architectures, modeling, and simulation : 8th international workshop, Samos 2008, Samos, Greece, July 21 - 24, 2008 ; proceedings Electrocardiogram on wireless sensor nodes Eine skalierbare, verteilte Prozessor-Architektur mit simultanem multi-threading für Anwendungen der digitalen Signalverarbeitung

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Katalog der Deutschen Nationalbibliothek

Mladen Bereković (1967-)

Single engine architecture for hardware root of trust

A HW/SW Framework for Increased Productivity in Designing Faster and More Secure Heterogeneous Computing Systems

Beitrag zur Optimierung der statischen Speicherverwaltung in eingebetteten Mehrkernsystemen mit einer harten Echtzeitanforderung : Contribution to the optimization of the static memory management in embedded multicore systems with hard real-time requirements

Coarse-grained graph compilation for embedded multiprocessors

Fault-tolerant CNN accelerator with reconfigurable capabilities

Fault Tolerance and Hardware Acceleration for Automotive and Aerospace Computing Architectures

Generic, Extensible Mass Memory Controller Architecture for Short-Term and Long-Term Storage in Space Applications

Universal Scripting Interface : Eine universelle Scripting-Schnittstelle für SystemC am Beispiel SoCRocket

ARCS 2013 : workshop proceedings

Mixed-Criticality on-Chip Network Modeling for fast Virtual Prototyping of Complex Many-Core SoCs

Resilient PUF Replacement Based on Secret Unknown Ciphers and its IoT Applications

Design technology co-optimization for below N7 technology nodes

Evaluating and Comparing the Performance and the Power Consumption of the EESS algorithm for CSS on Heterogeneous Computing Architectures

Static Allocation of Basic Blocks Based on Runtime and Memory Requirements in Embedded Real-Time Systems with Hierarchical Memory Layout

A Flexible, Heterogeneous Image Processing Framework for Spaceborne Reconfigurable Data Processing Modules

An Improved Framework for and Case Studies in FPGA-Based Application Acceleration - Computer Vision, In-Network Processing and Spiking Neural Networks

Analysis and Enhancement of a Fault-Tolerant NoC for SRAM-based FPGAs in Space Applications

Standard Compliant Snapshotting for SystemC Virtual Platforms

Automatisiertes Lernen von Neuronalen Netzen zur Objektklassifikation auf heterogenen Systemen

Optimization of energy and power driven architectural exploration for multi-core and heterogeneous System on Chip

Architecture of Computing Systems – ARCS 2018 : 31st International Conference, Braunschweig, Germany, April 9–12, 2018, Proceedings

Domain-Specific High Level Synthesis of Floating-Point Computations to Resource-Shared Microarchitectures

Dreidimensional speicherintegrierte Verarbeitungsarchitekturen: Ein holistisches Werkzeug zur Modellierung und Simulation

An Execution Model and High-Level-Synthesis System for Generating SIMT Multi-Threaded Hardware from C Source Code

Design of Object Detection Systems on a SoC-FPGA Platform

ARCS 2013 : workshop proceedings

Architecture of computing systems : 24th international conference ; proceedings

Architecture of Computing Systems - ARCS 2010 : 23rd International Conference, Hannover, Germany, February 22-25, 2010. Proceedings

Architecture of computing systems : proceedings

Architecture of computing systems : proceedings

Embedded computer systems: architectures, modeling, and simulation : 8th international workshop, Samos 2008, Samos, Greece, July 21 - 24, 2008 ; proceedings

Embedded computer systems: architectures, modeling, and simulation : 8th international workshop, Samos 2008, Samos, Greece, July 21 - 24, 2008 ; proceedings

Electrocardiogram on wireless sensor nodes

Eine skalierbare, verteilte Prozessor-Architektur mit simultanem multi-threading für Anwendungen der digitalen Signalverarbeitung