Katalog der Deutschen Nationalbibliothek

2-dimensional arrangement in rectangles

A catalog of Hanan grid problems

A class of problems for which cyclic relaxation converges linearly

A conjecture of Borodin and a coloring of Grünbaum

A fast algorithm for rectilinear Steiner tress with length restrictions on obstacles

A faster algorithm for the unbalanced Hitchcock transportion problem

A generalization of a theorem of Kleitman and Krieger

A generalization of Dijkstra's shortest path algorithm with applications to VLSI routing

A linear representation of the ear matroid

A local approximation algorithm for maximum weight matching

A note on Schrijver's submodular function minimization algorithm

A scale invariant exact algorithm for dense rectangle packing problems

A subgradient method using alternating projections

A tutorial on VLSI placement

An approximation algorithm for threshold voltage optimization

An article about Steiner ratio conjecture

An effective algorithm for mixed size VLSI placement

An effective congestion driven placement framework

An exact algorithm for wirelength optimal placements in VLSI design

An improved analysis of Goemans and Williamson's LP relaxation for MAX SAT

An orientation theorem with parity conditions

Analytical methods in VLSI placement

Analyzing the structure of large graphs

Approaching 3/2 for s-t-path TSP

Approximating separable nonlinear functions via mixed zero one programs

Approximation algorithms for facility location problems (lecture notes)

Approximation algorithms for network design and facility location with service capacities

Approximation of rectilinear Steiner trees with length restrictions on obstacles

Asymptotically optimal Boolean circuits for functions of the form gn-1(gn-2(...g3(g2(g1(x1,x2),x3),x4)...,xn-1), xn) given input arrival times

Automatic cell layout in the 7nm era

Better s-t tours by Gao trees

Binary adder circuits of asymptotically minimum depth, linear size, and fan-out two

Binary trees with choosable edge lengths

Bisubmodular function minimization

Bonnplace legalization: minimizing movement by iterative augmentation

Bonnplace: a self-stabilizing placement framework

BonnPlace: placement of leading-edge chips by advanced combinatorial algorithms

Bonnroute: algorithms and data structures for fast and good VLSI routing

Bonntools: mathematical innovation for layout and timing closure of systems on a chip

Chromatic characterization of biclique cover

Clock scheduling and clocktree construction for high performance asics

Combinatorial optimization in VLSI design

Combinatorial problems in chip design

Counting pattern-free set partitions

1

Cycle time and slack optimization for VLSI-chips

d-dimensional arrangement revisited

Delay optimization of linear depth boolean circuits with prescribed input arrival times

Delay related secondary objectives for rectilinear Steiner minimum trees

Detailed routing algorithms for advanced technology nodes

Dijkstra meets Steiner : a fast exact goal-oriented Steiner tree algorithm

Disconnected coverings for oriented matroids via simultanious mutations

Dual consistent systems of linear inequalities and cardinality constrained polytopes

EDGE connection of graphs, digraphs and hypergraphs

Edge connectivity augmentations of graphs and hypergraphs

Edge-disjoint paths in series parallel graphs

Efficient algorithms for short and fast repeater trees

1. Topology generation

Efficient algorithms for short and fast repeater trees

2. Buffering

Efficient generation of short and fast repeater tree topologies

Efficient implementation of the Goldberg-Tarjan minimum cost flow algorithm

Eliminating edges in TSP instances